philips semiconductors product specification 74abt240 octal inverting buffer (3-state) 2 1996 sep 10 8531608 17274 features ? octal bus interface ? 3-state buffers ? output capability: +64ma/32ma ? latch-up protection exceeds 500ma per jedec std 17 ? esd protection exceeds 2000 v per mil std 883 method 3015 and 200 v per machine model ? power-up 3-state ? live insertion/extraction permitted description the 74abt240 high-performance bicmos device combines low static and dynamic power dissipation with high speed and high output drive. the 74abt240 device is an octal inverting buffer that is ideal for driving bus lines. the device features two output enables (1oe , 2oe ), each controlling four of the 3-state outputs. quick reference data symbol parameter conditions t amb = 25 c; gnd = 0v typical unit t plh t phl propagation delay nax to ny x c l = 50pf; v cc = 5v 3.1 ns c in input capacitance v i = 0v or v cc 4 pf c out output capacitance outputs disabled; v o = 0v or v cc 7 pf i ccz total supply current outputs disabled; v cc =5.5v 50 m a ordering information packages temperature range outside north america north america dwg number 20-pin plastic dip 40 c to +85 c 74abt240 n 74abt240 n sot146-1 20-pin plastic so 40 c to +85 c 74abt240 d 74abt240 d sot163-1 20-pin plastic ssop type ii 40 c to +85 c 74abt240 db 74abt240 db sot339-1 20-pin plastic tssop type i 40 c to +85 c 74abt240 pw 74abt240pw dh sot360-1 pin description pin number symbol name and function 2, 4, 6, 8 1a0 1a3 data inputs 11, 13, 15, 17 2a0 2a3 data inputs 18, 16, 14, 12 1y 0 1y 3 data outputs 9, 7, 5, 3 2y 0 2y 3 data outputs 1, 19 1oe , 2oe output enables 10 gnd ground (0v) 20 v cc positive supply voltage pin configuration 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 1oe 1a0 2y 0 1a1 2y 1 1a2 2y 2 1a3 2y 31y 3 gnd 2a2 1y 2 2a1 1y 1 2a0 1y 0 2oe v cc 2a3 sa00034
philips semiconductors product specification 74abt240 octal inverting buffer (3-state) 1996 sep 10 3 logic symbol 1 1a0 2 1a1 4 1a2 6 1a3 8 2oe 19 2a0 11 13 15 17 2a1 18 2a2 16 2a3 14 12 1y 0 1y 1 1y 2 1y 3 2y 0 2y 1 2y 2 2y 3 9 7 5 3 1oe sa00035 function table inputs outputs 1oe 1an 2oe 2an 1y n 2y n l l l l h h l h l h l l h x h x z z h = high voltage level l = low voltage level x = don't care z = high impedance ooffo state logic symbol (ieee/iec) en 1 2 18 4 16 6 14 8 12 19 11 9 13 7 15 5 17 3 en sa00036 absolute maximum ratings 1, 2 symbol parameter conditions rating unit v cc dc supply voltage 0.5 to +7.0 v i ik dc input diode current v i < 0 18 ma v i dc input voltage 3 1.2 to +7.0 v i ok dc output diode current v o < 0 50 ma v out dc output voltage 3 output in off or high state 0.5 to +5.5 v i out dc output current output in low state 128 ma t stg storage temperature range 65 to 150 c notes: 1. stresses beyond those listed may cause permanent damage to the device. these are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under arecommended operating conditionso is not implied. exposur e to absolute-maximum-rated conditions for extended periods may affect device reliability. 2. the performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create ju nction temperatures which are detrimental to reliability. the maximum junction temperature of this integrated circuit should not excee d 150 c. 3. the input and output voltage ratings may be exceeded if the input and output current ratings are observed.
philips semiconductors product specification 74abt240 octal inverting buffer (3-state) 1996 sep 10 4 recommended operating conditions symbol parameter limits unit symbol parameter min max unit v cc dc supply voltage 4.5 5.5 v v i input voltage 0 v cc v v ih high-level input voltage 2.0 v v il low-level input voltage 0.8 v i oh high-level output current 32 ma i ol low-level output current 64 ma d t/ d v input transition rise or fall rate 0 10 ns/v t amb operating free-air temperature range 40 +85 c dc electrical characteristics limits symbol parameter test conditions t amb = +25 c t amb = 40 c to +85 c unit min typ max min max v ik input clamp voltage v cc = 4.5v; i ik = 18ma 0.9 1.2 1.2 v v cc = 4.5v; i oh = 3ma; v i = v il or v ih 2.5 2.9 2.5 v v oh high-level output voltage v cc = 5.0v; i oh = 3ma; v i = v il or v ih 3.0 3.4 3.0 v v cc = 4.5v; i oh = 32ma; v i = v il or v ih 2.0 2.4 2.0 v v ol low-level output voltage v cc = 4.5v; i ol = 64ma; v i = v il or v ih 0.42 0.55 0.55 v i i input leakage current v cc = 5.5v; v i = gnd or 5.5v 0.01 1.0 1.0 m a i off power-off leakage current v cc = 0.0v; v i or v o 4.5v; 5.0 100 100 m a i pu /i pd power-up/down 3-state output current 3 v cc = 2.1v; v o = 0.5v; v i = gnd or v cc ; v oe = don't care 5.0 50 50 m a i ozh 3-state output high current v cc = 5.5v; v o = 2.7v; v i = v il or v ih 5.0 50 50 m a i ozl 3-state output low current v cc = 5.5v; v o = 0.5v; v i = v il or v ih 5.0 50 50 m a i cex output high leakage current v cc = 5.5v; v o = 5.5v; v i = gnd or v cc 5.0 50 50 m a i o output current 1 v cc = 5.5v; v o = 2.5v 50 100 180 50 180 ma i cch v cc = 5.5v; outputs high, v i = gnd or v cc 50 250 250 m a i ccl quiescent supply current v cc = 5.5v; outputs low, v i = gnd or v cc 24 30 30 ma i ccz v cc = 5.5v; outputs 3-state; v i = gnd or v cc 50 250 250 m a d i cc additional supply current per input pin 2 outputs 3-state, one input at 3.4v, other inputs at v cc or gnd; v cc = 5.5v 0.5 1.5 1.5 ma notes: 1. not more than one output should be tested at a time, and the duration of the test should not exceed one second. 2. this is the increase in supply current for each input at 3.4v. 3. this parameter is valid for any v cc between 0v and 2.1v, with a transition time of up to 10msec. from v cc = 2.1v to v cc 5v 10% a transition time of up to 100 m sec is permitted.
philips semiconductors product specification 74abt240 octal inverting buffer (3-state) 1996 sep 10 5 ac characteristics gnd = 0v; t r = t f = 2.5ns; c l = 50pf, r l = 500 w limits symbol parameter waveform t amb = +25 c v cc = +5.0v t amb = 40 c to +85 c v cc = +5.0v 0.5v unit min typ max min max t plh t phl propagation delay nax to ny x 1 1.0 1.6 2.7 3.5 4.1 4.3 1.0 1.6 4.8 4.8 ns t pzh t pzl output enable time to high and low level 2 1.1 1.1 3.1 4.2 4.7 5.8 1.1 1.1 5.2 6.2 ns t phz t plz output disable time from high and low level 2 1.8 1.6 3.7 3.0 5.7 5.4 1.8 1.6 6.4 5.8 ns ac waveforms v m = 1.5v, v in = gnd to 3.0v nax input v m v m ny x output v m v m t phl t plh sa00037 waveform 1. waveforms showing the input (nax) to output (ny x) propagation delays noe input v m v m t pzh t phz nyx output v oh v m v m nyx output v ol t pzl t plz 3.5v 0v v ol + 0.3v v oh 0.3v sa00017 waveform 2. waveforms showing the 3-state output enable and disable times
philips semiconductors product specification 74abt240 octal inverting buffer (3-state) 1996 sep 10 6 test circuit and waveforms pulse generator r t v in v out c l r l v cc r l 7.0v test circuit for 3-state outputs v m v m t w amp (v) negative pulse 10% 10% 90% 90% 0v v m v m t w amp (v) positive pulse 90% 90% 10% 10% 0v t thl (t f ) t tlh (t r )t thl (t f ) t tlh (t r ) v m = 1.5v input pulse definition definitions r l = load resistor; see ac characteristics for value. c l = load capacitance includes jig and probe capacitance; see ac characteristics for value. r t = termination resistance should be equal to z out of pulse generators. input pulse requirements family amplitude rep. rate t w t r t f 74abt 3.0v 1mhz 500ns 2.5ns 2.5ns switch position test switch t plz closed t pzl closed all other open sa00012 d.u.t.
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